Z. Barzilai, D. Beece, et al.
DAC 1986
System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.
Z. Barzilai, D. Beece, et al.
DAC 1986
G. Almasi, G. Almasi, et al.
ISSCC 2002
Holly Rushmeier, R.D. Lawrence, et al.
VIS 1997
G. Almasi, C. Caşcaval, et al.
ICS 2001