S. Narasimha, P. Chang, et al.
IEDM 2012
We present, to our knowledge, the first published experimental demonstration of a CMOS inverter chain built from FinFETs, completely integrated in 180nm CMOS technology, using one level of copper wiring and tungsten vias. A four-stage inverter chain with Lgate = 200nm, Tsi =, 60nm, and Tox = 2.2nm was run at 1.5V. We demonstrate successfully propagating CMOS levels through four inverter stages employing over 300 fins.
S. Narasimha, P. Chang, et al.
IEDM 2012
D. Singh, Keith A. Jenkins, et al.
IEEE Electron Device Letters
H.-S. Philip Wong, B. Doris, et al.
VLSI-TSA 2003
H. Shang, L. Chang, et al.
VLSI Technology 2006