Conference paper
Development of stacking faults in strained silicon layers
S.W. Bedell, A. Reznicek, et al.
IEEE International SOI Conference 2005
In this letter, we report germanium (Ge) p-channel MOSFETs with a thin gate stack of Ge oxynitride and low-temperature oxide (LTO) on bulk Ge substrate without a silicon (Si) cap layer. The fabricated devices show 2 × higher transconductance and ∼ 40% hole mobility enhancement over the Si control with a thermal SiO2 gate dielectric, as well as the excellent subthreshold characteristics. For the first time, we demonstrate Ge MOSFETs with less than 100-mV/dec subthreshold slope.
S.W. Bedell, A. Reznicek, et al.
IEEE International SOI Conference 2005
S.J. Koester, K.L. Saenger, et al.
DRC 2004
S.W. Bedell, N. Daval, et al.
ECS Meeting 2009
S.J. Koester, E.W. Kiewra, et al.
Applied Physics Letters