Capacity optimization of emerging memory systems: A shannon-inspired approach to device characterization
- Jesse H. Engel
- Sukru Burc Eryilmaz
- et al.
- 2014
- IEDM 2014
Publications
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114 results for H.-S. Philip Wong
Experimental demonstration of array-level learning with phase change synaptic devices
- S. Burc Eryilmaz
- Duygu Kuzum
- et al.
- 2013
- IEDM 2013
A non-iterative compact model for carbon nanotube FETs incorporating source exhaustion effects
- Lan Wei
- David J. Frank
- et al.
- 2009
- IEDM 2009
Crystallization characteristics of phase change nanoparticle arrays fabricated by self-assembly based lithography
- Yuan Zhang
- Simone Raoux
- et al.
- 2008
- MRS Spring Meeting 2008
Carbon nanotube field effect transistors - Fabrication, device physics, and circuit implications
- H.-S. Wong
- J. Appenzeller
- et al.
- 2003
- ISSCC 2003
Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
- Jakub Kedzierski
- Edward Nowak
- et al.
- 2002
- IEDM 2002
Extreme scaling with ultra-thin Si channel MOSFETs
- Bruce Doris
- Meikei Ieong
- et al.
- 2002
- IEDM 2002
High mobility p-channel germanium MOSFETS with a thin Ge oxynitride gate dielectric
- Huiling Shang
- Harald Okorn-Schmidt
- et al.
- 2002
- IEDM 2002
Examination of hole mobility in ultra-thin body SOI MOSFETs
- Zhibin Ren
- Paul M. Solomon
- et al.
- 2002
- IEDM 2002
Carbon nanotube field effect transistors for logic applications
- Richard Martel
- Hon-Sum Philip Wong
- et al.
- 2001
- IEDM 2001