Sonia Cafieri, Jon Lee, et al.
Journal of Global Optimization
The likely possibility of having to support the 70nm technology node with 193nm lithography is presented. The extremely significant resolution challenges and the ability of strong resolution enhancement techniques (RET) to meet them, is discussed. Evidence is presented that all strong RET impact the design flow by imposing nontrivial design restrictions. Data from an in-depth alternating phase shifted mask (altPSM) design feasibility assessment, conducted on the poly-gate level of the 180nm technology node, is presented to give an outlook on the feasibility of RET-enabled design flows. Anticipated complications in taking such RET-enabled design flows to the complexity required for multiple critical levels of the 70nm node are discussed. An EDA solution focusing on complete integration of RET layout manipulations into the design flow is contrasted to an approach focusing on complex, optimized design rule compromises. © 2002 SPIE · 0277-786X/02/$15.00.
Sonia Cafieri, Jon Lee, et al.
Journal of Global Optimization
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CCS 2024
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