New preamorphization technique for very shallow p+-n junctions
B. Davari, E. Ganin, et al.
VLSI Technology 1989
A fully self-aligned mesa transistor structure is presented that self-aligns the emitter and base not only to each other, but also to the shallow trench isolation. This mesa self-aligned, shallow-trench-isolated transistor (MSST) is built with an expitaxial base, deposited early in the process, and low-temperature processing. An initial masking and etching step defines the active emitter area and a novel processing sequence self-aligns the sidewall contact and shallow trench isolation to the emitter. Both Cbc and Rb are reduced through the use of a shallow sidewall-contact. The final MSST structure has a planar surface compatible with multilevel metallization. First device results show excellent electrical characteristics.
B. Davari, E. Ganin, et al.
VLSI Technology 1989
S. Voldman, P. Juliano, et al.
EOS/ESD 2000
M. Soyuer, J.N. Burghartz, et al.
BCTM 1996
K. Schonenberg, Siu-Wai Chan, et al.
Journal of Materials Research