Optimizing history effects in 65nm PD-SOI CMOS
Q. Liang, T. Kawamura, et al.
IEEE International SOI Conference 2006
An increased significance of the parasitic bipolar transistor (BJT) in scaled floating-body partially depleted SOI MOSFET's under transient conditions is described. The transient parasitic BJT effect is analyzed using both simulations and highspeed pulse measurements of pass transistors in a sub-0.25 μm SOI technology. The transient BJT current can be significant even at low drain-source voltages, well below the device breakdown voltage, and does not scale with technology. Our analysis shows that it can be problematic in digital circuit operation, possibly causing write disturbs in SRAM's and decreased retention times for DRAM's Proper device/circuit design, suggested by our analysis, can however control the problems.
Q. Liang, T. Kawamura, et al.
IEEE International SOI Conference 2006
Duckhyun Chang, Jerry G. Fossum, et al.
IEEE Electron Device Letters
Mario M. Pelella, Phung T. Nguyen, et al.
BCTM 1992
Terence B. Hook, Mario M. Pelella
IEEE International SOI Conference 2008