Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
A new experimental complimentary metal-oxide semiconductor (CMOS) technology is presented, fabricated with Schottky source and drain and a T-shaped gate. The process results in a significant reduction in the number of steps required to fabricate CMOS, and no longer relies on implantation of the source and drain. The gate resistance and the source/drain contact resistance are very low compared to conventional designs. Performance of 0.25 and 0.15 μm channel length devices has been measured and the technology is readily scalable to sub-0.1 μm dimensions. © 1997 American Vacuum Society.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
A. Gangulee, F.M. D'Heurle
Thin Solid Films
Kigook Song, Robert D. Miller, et al.
Macromolecules
A. Reisman, M. Berkenblit, et al.
JES