A.G. Schrott, J. Misewich, et al.
Materials Research Society Symposium - Proceedings
In this letter, we introduce an architecture for a room-temperature oxide channel field-effect transistor where the oxide channel material is buried below the gate oxide layer. This architecture has several significant advantages over the surface channel architecture [D. M. Newns, J. A. Misewich, C. C. Tseui, A. Gupta, B. A. Scott, and A. Schrott, Appl. Phys. Lett. 73, 780 (1998).] in coupling capacitance, channel mobility, and channel stability. Although the transconductance in the devices has been improved to 45 μS (at Vd = 1 V and Vg = 2 V for a channel length of 1 μm and width = 150 μm), capacitance measurements show that the surface charge density is still below the optimal theoretical value. © 2000 American Institute of Physics.
A.G. Schrott, J. Misewich, et al.
Materials Research Society Symposium - Proceedings
J.A. Prybyla, T.F. Heinz, et al.
Physical Review Letters
T.D. Happ, M. Breitwisch, et al.
VLSI Technology 2006
J.E.E. Baglin, A.G. Schrott, et al.
Nuclear Inst. and Methods in Physics Research, B