Conference paper
CMOS technology roadmap for the next fifteen years
T.H. Ning
Microelectronics and VLSI, TENCON 1995
A stacked transistor on SOI shows the potential to provide soft error upset immune designs. Key design elements are presented and analyzed showing tradeoffs between standard SOI devices and stacked devices, as well as alternative layouts to optimize soft error upset immunity. ©2010 IEEE.
T.H. Ning
Microelectronics and VLSI, TENCON 1995
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