William Hinsberg, Joy Cheng, et al.
SPIE Advanced Lithography 2010
Electrical test structures provide a method of rapid, low-cost end-of-process metrology for both materials properties and specific process information. The results from electrical test structures for routine monitoring of key process parameters such as line width, edge-taper width, layer-to-layer alignment, and metal coverage are compared with those from traditional metrology methods. In all cases, the correlation coefficient R was near unity, R2 ≥ 0.97, demonstrating that electrical test structures have sufficient accuracy for process-control applications. For the structures used, the line width, edge-taper width, and layer-to-layer-alignment electrical measurements have uncertainties of less than 0.1 μm. The test structures are all compatible with typical thin-film-transistor (TFT) array processing.
William Hinsberg, Joy Cheng, et al.
SPIE Advanced Lithography 2010
Yigal Hoffner, Simon Field, et al.
EDOC 2004
Corneliu Constantinescu
SPIE Optical Engineering + Applications 2009
S.F. Fan, W.B. Yun, et al.
Proceedings of SPIE 1989