30.2 A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET
- Gain Kim
- Lukas Kull
- et al.
- 2019
- ISSCC 2019
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A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET
- Gain Kim
- Marcel Kossel
- et al.
- 2020
- IEEE JSSC
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET
- Gain Kim
- Lukas Kull
- et al.
- 2019
- A-SSCC 2019
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver
- Gain Kim
- Lukas Kull
- et al.
- 2018
- ISCAS 2018
An 8b 1.0-to-1.25 GS/s Time-Based ADC With Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC
- A. Serdar Yonar
- Pier Andrea Francese
- et al.
- 2023
- IEEE SSC-L