A Discrete Multitone Wireline Transceiver Datapath With On-Chip Sign-Sign LMS Adaptation and Loading Profile Optimization on RFSoC
- Jaewon Lee
- Seoyoung Jang
- et al.
- 2024
- IEEE TCAS-II
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Recent Advances in Ultra-High-Speed Wireline Receivers with ADC-DSP-Based Equalizers
- Seoyoung Jang
- Jaewon Lee
- et al.
- 2024
- IEEE Open Journal of the Solid-State Circuits Society
A 2-Lane Discrete Multitone Wireline Receiver Datapath With Far-End Crosstalk Cancellation on RFSoC Platform
- Jaewon Lee
- Seoyoung Jang
- et al.
- 2024
- IEEE TCAS-II
A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification on RFSoC Platform
- Jaewon Lee
- Seoyoung Jang
- et al.
- 2024
- IEEE TCAS-II
A Loop-Break Decision Feedback Equalizer for DAC/ADC-DSP-Based Wireline Transceivers
- Donggeon Kim
- Yujin Choi
- et al.
- 2024
- IEEE TCAS-I
An 8b 1.0-to-1.25 GS/s Time-Based ADC With Bipolar VTC and Sense Amplifier Latch Interpolated Gated Ring Oscillator TDC
- A. Serdar Yonar
- Pier Andrea Francese
- et al.
- 2023
- IEEE SSC-L
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET
- Gain Kim
- Marcel Kossel
- et al.
- 2020
- IEEE JSSC
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET
- Gain Kim
- Lukas Kull
- et al.
- 2019
- A-SSCC 2019
30.2 A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET
- Gain Kim
- Lukas Kull
- et al.
- 2019
- ISSCC 2019
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver
- Gain Kim
- Lukas Kull
- et al.
- 2018
- ISCAS 2018