Low thermal budget antimony/phosphorus NMOS technology for CMOS
- D.L. Harame
- E. Ganin
- et al.
- 1991
- IEDM 1991
Publications
Date
Featured collections
Popular topics
20 results for E. Ganin
Epitaxial-base double-poly self-aligned bipolar transistors
- E. Ganin
- T.C. Chen
- et al.
- 1990
- IEDM 1990
High performance Si and SiGe-base pnp transistors
- D.L. Harame
- J.M.C. Stork
- et al.
- 1988
- IEDM 1988
EXPERIMENTAL TECHNOLOGY AND CHARACTERIZATION OF SELF-ALIGNED 0. 1 mu M-GATE-LENGTH LOW-TEMPERATURE OPERATION NMOS DEVICES.
- G.A. Sai-Halasz
- M.R. Wordeman
- et al.
- 1986
- IEDM 1986
High-Performance Devices for a 0.15-μm CMOS Technology
- G. Shahidi
- James Warnock
- et al.
- 1993
- IEEE Electron Device Letters
Graded-SiGe-Base, Poly-Emitter Heterojunction Bipolar Transistors
- Gary L. Patton
- David L. Harame
- et al.
- 1989
- IEEE Electron Device Letters
Inverter Performance Of Deep-Submicrometer Mosfet'S
- George A. Sai-Halasz
- Matthew R. Wordeman
- et al.
- 1988
- IEEE Electron Device Letters
High Transconductance and Velocity Overshoot in NMOS Devices at the 0.1-μm Gate-Length Level
- George A. Sai-Halasz
- Matthew R. Wordeman
- et al.
- 1988
- IEEE Electron Device Letters
Design and Experimental Technology for 0.1-μm Gate-Length Low-Temperature Operation FET's
- George A. Sai-Halasz
- Matthew R. Wordeman
- et al.
- 1987
- IEEE Electron Device Letters
Phase edge lithography for sub 0.1 μm electrical channel length in a 200 MM full CMOS process
- P. Agnello
- T. Newman
- et al.
- 1995
- VLSI Technology 1995