A new planarization technique, using a combination of RIE and chemical mechanical polish (CMP)
- B. Davari
- C. Koburger
- et al.
- 1989
- IEDM 1989
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5 results for John Mauer
Variable-size shallow trench isolation (STI) technology with diffused sidewall doping for submicron CMOS
- B. Davari
- C. Koburger
- et al.
- 1988
- IEDM 1988
Analysis of cluster tool performance in semiconductor manufacturing
- John L. Mauer
- Roland E. A. Schelasin
- et al.
- 1992
- IEMT 1992
Using simulation to analyze integrated tool performance in semiconductor manufacturing
- John Mauer
- Roland Schelasin
- 1994
- Microelectronic Engineering
An Advanced High-Performance Trench-Isolated Self-Aligned Bipolar Technology
- G.P. Li
- Tak H. Ning
- et al.
- 1987
- IEEE T-ED