TCAD/physics-based analysis of high-density dual-BOX FD/SOI SRAM cell with improved stability
- Keunwoo Kim
- Jente B. Kuang
- et al.
- 2009
- IEEE Transactions on Electron Devices
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23 results for Hung C. Ngo
A 1 MB cache subsystem prototype with 1.8 ns embedded DRAMs in 45 nm SOI CMOS
- Peter J. Klim
- John Barth
- et al.
- 2009
- IEEE Journal of Solid-State Circuits
Stable high-density FD/SOI SRAM with selective back-gate bias using dual buried oxide
- Keunwoo Kim
- Jente B. Kuang
- et al.
- 2008
- IEEE International SOI Conference 2008
SRAM methodology for yield and power efficiency: Per-element selectable supplies and memory reconfiguration schemes
- Rouwaida Kanj
- Rajiv V. Joshi
- et al.
- 2008
- ISLPED 2008
Circuit techniques utilizing independent gate control in double-gate technologies
- Jente B. Kuang
- Keunwoo Kim
- et al.
- 2008
- IEEE Transactions on VLSI Systems
A one MB cache subsystem prototype with 2GHz embedded DRAMs in 45nm SOI CMOS
- Peter Klim
- John Barth
- et al.
- 2008
- VLSI Circuits 2008
Low-power high-performance asymmetrical double-gate circuits using back-gate-controlled wide-tunable-range diode voltage
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2007
- IEEE Transactions on Electron Devices
An asymmetrical double-gate VCO with wide frequency range
- Hung Ngo
- Keunwoo Kim
- et al.
- 2006
- VLSI-TSA 2006
The design and implementation of a low-overhead supply-gated SRAM
- J.B. Kuang
- Hung Ngo
- et al.
- 2006
- ESSCIRC 2006
Back-gate controlled wide tunable range diode voltage in asymmetrical double-gate devices
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2006
- IEEE SOI 2006