Power-conscious design of the cell processor's synergistic processor element
- Osamu Takahashi
- Scott Cottier
- et al.
- 2005
- IEEE Micro
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15 results for Osamu Takahashi
1-GHz fully pipelined 3.7-ns address access time 8 k × 1024 embedded synchronous DRAM macro
- Osamu Takahashi
- Sang H. Dhong
- et al.
- 2000
- IEEE Journal of Solid-State Circuits
A 1-GHz logic circuit family with sense amplifiers
- O. Takahashi
- Naoaki Aoki
- et al.
- 1999
- IEEE Journal of Solid-State Circuits
1.0-GHz single-issue 64-bit PowerPC integer processor
- Joel Silberman
- Naoaki Aoki
- et al.
- 1998
- IEEE Journal of Solid-State Circuits
Designing for a gigahertz
- H. Peter Hofstee
- Sang H. Dhong
- et al.
- 1998
- IEEE Micro