PECVD Low-k (∼2.7) dielectric SiCOH film development and integration for 65 nm CMOS devices
- K. Ida
- S. Nguyen
- et al.
- 2005
- AMC 2005
Publications
Date
Featured collections
Popular topics
12 results for S. Lane
A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applications
- Matthew Angyal
- Jason Gill
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65nm groundrules
- S. Lane
- M. Fukasawa
- et al.
- 2005
- AMC 2005
BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules
- M. Fukasawa
- S. Lane
- et al.
- 2005
- IITC 2005
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
- E. Leobandung
- H. Nayakama
- et al.
- 2005
- VLSI Technology 2005
Low-k/copper integration scheme suitable for ULSI manufacturing from 90nm to 45nm nodes
- T. Nogami
- S. Lane
- et al.
- 2005
- Optics East 2005
Lower-k SiCOH integration for 65 nm ground rules
- T. Nogami
- S. Lane
- et al.
- 2005
- VMIC 2005
Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH technology
- D. Edelstein
- C.R. Davis
- et al.
- 2004
- IITC 2004
Optimization of SiCOH dielectrics for integration in a 90 nm CMOS technology
- A. Grill
- D. Edelstein
- et al.
- 2004
- IITC 2004
Channel cracking in low-k films on patterned multi-layers
- X.-H. Liu
- T.M. Shaw
- et al.
- 2004
- IITC 2004