Optimizing stressor film deposition sequence in polish rate order for best planarization
- John H. Zhang
- Changyong Xiao
- et al.
- 2011
- MRS Spring Meeting 2011
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27 results for Laertis Economikos
Using CMP model for 45nm/32nm BEOL process and design evaluations
- Laertis Economikos
- Jerry Bao
- et al.
- 2010
- ECS Meeting 2010
Cu CMP edge uniformity improvement studies for 32 nm technology node and beyond
- John H. Zhang
- Laertis Economikos
- et al.
- 2010
- MRS Online Proceedings Library
Back-end-of-line quadrature-clocked voltage-dependent capacitance measurements
- Stas Polonsky
- Paul Solomon
- et al.
- 2009
- ISTFA 2009
Evaluation of barrier CMP slurries and characterization of ULK material properties shifts due to CMP
- Wei-Tsu Tseng
- Dimitri Kioussis
- et al.
- 2008
- ECS Meeting 2008
Evaluation of Cu CMP barrier slurries for Ultra Low-k dielectric film (k~2.4) for 45nm technology
- Feng Zhao
- Laertis Economikos
- et al.
- 2007
- ICPT 2007
A 45 nm CMOS node Cu/low-k/ ULtra low-k PECVD SiCOH (k=2.4) BEOL technology
- S. Sankaran
- S. Arai
- et al.
- 2006
- IEDM 2006
Chemical-mechanical polishing of SiCOH-based low-k dielectrics
- Wei-Tsu Tseng
- Akihisa Sakamoto
- et al.
- 2006
- ECS Meeting 2006
A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applications
- Matthew Angyal
- Jason Gill
- et al.
- 2005
- AMC 2005
Dual stress liner enhancement in hybrid orientation technology
- C. Sheraw
- M. Yang
- et al.
- 2005
- VLSI Technology 2005