Non-invasive timing analysis of IBM G6 microprocessor L1 cache using backside time-resolved hot electron luminescence
- S. Polonsky
- D.R. Knebel
- et al.
- 2000
- ISSCC 2000
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12 results for Steven C. Wilson
High-voltage and high-power PLL diagnostics using advanced cooling and emission images
- Franco Stellari
- Peilin Song
- et al.
- 2006
- IEEE ITC 2006
Characterization of a 0.13 μm CMOS link chip using time resolved emission (TRE)
- Franco Stellari
- Peilin Song
- et al.
- 2005
- ESREF 2005
Latchup Analysis Using Emission Microscopy
- Franco Stellari
- Peilin Song
- et al.
- 2003
- Microelectronics Reliability
High performance SRAMs in 1.5 V, 0.18μm partially depleted SOI technology
- R.V. Joshi
- A. Pellela
- et al.
- 2002
- VLSI Circuits 2002
`Cool low power' 1 GHz multi-port register file and dynamic latch in 1.8 V, 0.25 μm SOI and bulk technology
- R.V. Joshi
- W. Hwang
- et al.
- 2000
- ISLPED 2000
`Cool low power' 1 GHz multi-port register file and dynamic latch in 1.8 V, 0.25 μm SOI and bulk technology
- R.V. Joshi
- W. Hwang
- et al.
- 2000
- ISLPED 2000
2 GHz cycle, 430 ps access time 34 Kb L1 directory SRAM in 1.5 V, 0.18 μm CMOS bulk technology
- R.V. Joshi
- S.P. Kowalczyk
- et al.
- 2000
- VLSI Circuits 2000
Picosecond Imaging Circuit Analysis of the IBM G6 Microprocessor Cache
- Moyra McManus
- Pia Sanda
- et al.
- 1999
- ISTFA 1999
Frequency dependent behavior of a high performance dynamic register file in 1.8 V, 0.25 μm SOI technology
- R.V. Joshi
- W. Hwang
- et al.
- 1999
- IEEE International SOI Conference 1999