Assembly technology for three dimensional integrated circuits
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- VMIC 2005
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199 results for Rajiv V. Joshi
A low-overhead virtual rail technique for SRAM leakage power reduction
- J.B. Kuang
- Hung Ngo
- et al.
- 2005
- ICCD 2005
Variability analysis for sub-100 nm PD/SOI CMOS SRAM cell
- Rajiv V. Joshi
- Saibal Mukhopadhyay
- et al.
- 2004
- ESSCIRC 2004
FinFET SRAM for high-performance low-power applications
- Rajiv V. Joshi
- Richard Q. Williams
- et al.
- 2004
- ESSDERC/ESSCIRC 2004
A transregional CMOS SRAM with single, logic V DD and dynamic power rails
- Azeez J. Bhavnagarwala
- Stephen V. Kosonocky
- et al.
- 2004
- VLSI Circuits 2004
Nanoscale CMOS Circuit Leakage Power Reduction by Double-Gate Device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2004
- ISLPED 2004
Nanoscale CMOS circuit leakage power reduction By Double-gate device
- Keunwoo Kim
- Koushik K. Das
- et al.
- 2004
- ISLPED 2004
Simulation of nano-scale multi-fingered PD/SOI mosfets using the boltzmann transport equation
- José A. Pascual-Gutiérrez
- Jayathi Y. Murthy
- et al.
- 2004
- HT/FED 2004
A novel technique for steady state analysis for VLSI circuits in partially depleted SOI
- R.V. Joshi
- K. Kroell
- et al.
- 2004
- VLSID/Embedded 2004
New digital circuit techniques for total standby leakage reduction in nano-scale SOI technology
- Koushik K. Das
- Rajiv V. Joshi
- et al.
- 2003
- ESSCIRC 2003