Optimal dual-VT design in sub-100 nanometer PDSOI and double-gate technologies
- Aditya Bansal
- Jae-Joon Kim
- et al.
- 2008
- VLSID 2008
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30 results for Saibal Mukhopadhyay
Design and analysis of thin-BOX FD/SOI devices for low-power and stable SRAM in sub-50nm technologies
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2007
- ISLPED 2007
High-performance device optimization and dual-VT technology options for doublegate FET
- Aditya Bansal
- Keunwoo Kim
- et al.
- 2007
- ICICDT 2007
High-performance SRAM in nanoscale CMOS: Design challenges and techniques
- Ching-Te Chuang
- Saibal Mukhopadhyay
- et al.
- 2007
- MTDT 2007
Modeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISQED 2005
Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISLPED 2005
Variability analysis for sub-100 nm PD/SOI CMOS SRAM cell
- Rajiv V. Joshi
- Saibal Mukhopadhyay
- et al.
- 2004
- ESSCIRC 2004
Securing IoT Devices Using Dynamic Power Management: Machine Learning Approach
- Nikhil Chawla
- Arvind Singh
- et al.
- 2021
- IEEE IoT Journal
A simulation study of oxygen vacancy-induced variability in HfO 2/metal gated SOI FinFET
- Amit Ranjan Trivedi
- Takashi Ando
- et al.
- 2014
- IEEE T-ED
SRAM write-ability improvement with transient negative bit-line voltage
- Saibal Mukhopadhyay
- Rahul M. Rao
- et al.
- 2011
- IEEE Transactions on VLSI Systems