Implementation of Low-Power 6-8 b 30-90 GS/s Time-Interleaved ADCs With Optimized Input Bandwidth in 32 nm CMOS
- Lukas Kull
- J. Pliva
- et al.
- 2016
- IEEE JSSC
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5 results for J. Pliva
4×40 Gb/s 2 pJ/bit optical RX with 8ns power-on and CDR-lock time in 14nm CMOS
- Alessandro Cevrero
- Ilter Ozkaya
- et al.
- 2018
- OFC 2018
Adaptive high-speed and ultra-low power optical interconnect for data center communications
- Ronny Henker
- Thomas Toifl
- et al.
- 2017
- ICTON 2017
Adaptive optical interconnects: The ADDAPT project
- Ronny Henker
- J. Pliva
- et al.
- 2015
- SPIE Optics + Photonics 2015
A 110 mW 6 bit 36 GS/s interleaved SAR ADC for 100 GBE occupying 0.048 mm2 in 32 nm SOI CMOS
- Lukas Kull
- J. Pliva
- et al.
- 2014
- A-SSCC 2014