High performance and reliable strained SiGe PMOS FinFETs enabled by advanced gate stack engineering
- Pouya Hashemi
- Takashi Ando
- et al.
- 2017
- IEDM 2017
Publications
Date
Featured collections
Popular topics
14 results for Kam-Leung Lee
Performance comparison and channel length scaling of strained Si FETs on SiGe-on-insulator (SGOI)
- J. Cai
- K. Rim
- et al.
- 2004
- IEDM 2004
High performance and record subthreshold swing demonstration in scaled RMG SiGe FinFETs with high-Ge-content channels formed by 3D condensation and a novel gate stack process
- Pouya Hashemi
- Takashi Ando
- et al.
- 2017
- VLSI Technology 2017
High performance PMOS with strained high-Ge-content SiGe fins for advanced logic applications
- Pouya Hashemi
- Takashi Ando
- et al.
- 2017
- VLSI-TSA 2017
Prospects of high-Ge-content strained SiGe for advanced FinFET generations
- Pouya Hashemi
- Karthik Balakrishnan
- et al.
- 2016
- PRiME/ECS Meeting 2016
Demonstration of record SiGe transconductance and short-channel current drive in High-Ge-Content SiGe PMOS FinFETs with improved junction and scaled EOT
- Pouya Hashemi
- Kam-Leung Lee
- et al.
- 2016
- VLSI Technology 2016
Replacement high-K/metal-gate High-Ge-content strained SiGe FinFETs with high hole mobility and excellent SS and reliability at aggressive EOT ∼7Å and scaled dimensions down to sub-4nm fin widths
- Pouya Hashemi
- Takashi Ando
- et al.
- 2016
- VLSI Technology 2016
Poly-Si/AlN/HfSiO stack for ideal threshold voltage and mobility in sub-100 nm MOSFETs
- K.-L. Lee
- M.M. Frank
- et al.
- 2006
- VLSI Technology 2006
Ultra-thin SOI CMOS using laser spike anneal
- Zhibin Ren
- J. Sleight
- et al.
- 2006
- VLSI-TSA 2006
Optimization of high κ gate stacks with poly-Si, FUSI and metal electrodes
- R. Jammy
- V. Narayanan
- et al.
- 2005
- ISTC 2005