InGaAs-on-Insulator FinFETs with Reduced Off-Current and Record Performance
- Clarissa Convertino
- C. B. Zota
- et al.
- 2018
- IEDM 2018
Publications
Date
Featured collections
Popular topics
18 results for Saurabh Sant
A scaled replacement metal gate InGaAs-on-Insulator n-FinFET on Si with record performance
- Herwig Hahn
- Veeresh Deshpande
- et al.
- 2017
- IEDM 2017
Ultra-Thin III-V Photodetectors Epitaxially Integrated on Si with Bandwidth Exceeding 25 GHz
- Svenja Mauthe
- Yannick Baumgartner
- et al.
- 2020
- OFC 2020
Modeling whispering gallery mode III-V micro-lasers monolithically integrated on Silicon
- Saurabh Sant
- Andreas Schenk
- et al.
- 2018
- NUSOD 2018
Complementary III-V heterojunction tunnel FETs monolithically integrated on silicon
- Clarissa Convertino
- Heinz Schmid
- et al.
- 2018
- ECS Meeting 2018
The impact of hetero-junction and oxide-interface traps on the performance of InAs/Si and InAs/GaAsSb nanowire tunnel FETs
- Andreas Schenk
- Saurabh Sant
- et al.
- 2017
- SISPAD 2017
The impact of hetero-junction and oxide-interface traps on the performance of InAs/Si tunnel FETs
- Andreas Schenk
- Saurabh Sant
- et al.
- 2017
- IWJT 2017
How non-ideality effects deteriorate the performance of tunnel FETs
- Andreas Schenk
- Saurabh Sant
- et al.
- 2017
- EDTM 2017
III-V heterojunction nanowire tunnel FETs monolithically integrated on silicon
- Kirsten E. Moselund
- D. Cutaia
- et al.
- 2016
- NMDC 2016
Complementary III-V heterostructure tunnel FETs
- Kirsten E. Moselund
- D. Cutaia
- et al.
- 2016
- ESSDERC 2016