Very low voltage (VLV) design
- Ramon Bertran
- Pradip Bose
- et al.
- 2017
- ICCD 2017
Publications
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34 results for Robert Montoye
Matrix-matrix multiplication on a large register file architecture with indirection
- Dheeraj Sreedhar
- J.H. Derby
- et al.
- 2014
- HiPC 2014
1 Mb 0.41 μm2; 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert K. Montoye
- et al.
- 2014
- IEEE JSSC
Processor architecture for software implementation of multi-sector G-RAKE receivers for HSUPA wireless infrastructure
- D. Sreedhar
- J.H. Derby
- et al.
- 2013
- ICASSP 2013
1Mb 0.41 μm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert Montoye
- et al.
- 2013
- VLSI Circuits 2013
1Mb 0.41 μm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert Montoye
- et al.
- 2013
- VLSI Technology 2013
A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI
- Yong Liu
- Ping-Hsuan Hsieh
- et al.
- 2013
- ISSCC 2013
Architectural perspectives of future wireless base stations based on the IBM PowerEN™ processor
- Augusto Vega
- Pradip Bose
- et al.
- 2012
- HPCA 2012
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons
- Jae-Sun Seo
- Bernard Brezzo
- et al.
- 2011
- CICC 2011
Demonstration of CAM and TCAM using phase change devices
- Bipin Rajendran
- Roger W. Cheek
- et al.
- 2011
- IMW 2011