Successful dual damascene integration of extreme low k materials (k < 2.0) using a novel gap fill based integration scheme
- S.V. Nitta
- S. Purushothaman
- et al.
- 2004
- IEDM 2004
Publications
Date
Featured collections
Popular topics
19 results for M. Krishnan
Metal-gate FinFET and fully-depleted SOI devices using total gate silicidation
- Jakub Kedzierski
- Edward Nowak
- et al.
- 2002
- IEDM 2002
High performance and low leakage current InGaAs-on-silicon FinFETs with 20 nm gate length
- Xiao Sun
- Christopher P. D’Emic
- et al.
- 2017
- VLSI Technology 2017
An InGaAs on Si platform for CMOS with 200 mm InGaAs-OI substrate, gate-first, replacement gate planar and FinFETs down to 120 nm contact pitch
- V. Djara
- Veeresh Deshpande
- et al.
- 2015
- VLSI Technology 2015
CVD-Co/Cu(Mn) integration and reliability for 10 nm node
- Takeshi Nogami
- M. He
- et al.
- 2013
- IITC 2013
Attachment of silica and alumina nanoparticles as studied by QCM
- A. Hanel
- Jakub Nalaskowski
- et al.
- 2012
- CEE 2012
A novel low resistance gate fill for extreme gate length scaling at 20nm and beyond for gate-last high-k/metal gate CMOS technology
- U. Kwon
- K. Wong
- et al.
- 2012
- VLSI Technology 2012
Measuring layer-specific depth-of-focus requirements
- Bernhard Liegl
- Allen Gabor
- et al.
- 2008
- SPIE Advanced Lithography 2008
Electromigration Cu mass flow in Cu interconnections
- C.-K. Hu
- D. Canaperi
- et al.
- 2006
- Thin Solid Films
Chemical-mechanical polishing of SiCOH-based low-k dielectrics
- Wei-Tsu Tseng
- Akihisa Sakamoto
- et al.
- 2006
- ECS Meeting 2006