A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100× for Storage Class Memory Applications
- Win-San Khwa
- Meng-Fan Chang
- et al.
- 2017
- IEEE JSSC
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13 results for Tien-Yen Wang
A Retention-Aware multilevel cell phase change memory program evaluation metric
- Win-San Khwa
- Meng-Fan Chang
- et al.
- 2016
- IEEE Electron Device Letters
A resistance-drift compensation scheme to reduce MLC PCM raw BER by over 100× for storage-class memory applications
- Win-San Khwa
- Meng-Fan Chang
- et al.
- 2016
- ISSCC 2016
Greater than 2-bits/cell MLC storage for ultra high density phase change memory using a novel sensing scheme
- Jau-Yi Wu
- Win-San Khwa
- et al.
- 2015
- VLSI Technology 2015
A Procedure to Reduce Cell Variation in Phase Change Memory for Improving Multi-Level-Cell Performances
- Win-San Khwa
- Jau-Yi Wu
- et al.
- 2015
- IMW 2015
A novel inspection and annealing procedure to rejuvenate phase change memory from cycling-induced degradations for storage class memory applications
- Win-San Khwa
- Jau-Yi Wu
- et al.
- 2014
- IEDM 2014
Towards the integration of both ROM and RAM functions phase change memory cells on a single die for system-on-chip (SOC) applications
- H. Lung
- Matthew BrightSky
- et al.
- 2014
- VLSI Technology 2014
A double-density dual-mode phase change memory using a novel background storage scheme
- Jau-Yi Wu
- M.H. Lee
- et al.
- 2014
- VLSI Technology 2014
A scalable volume-confined phase change memory using physical vapor deposition
- S.C. Lai
- S. Kim
- et al.
- 2013
- VLSI Technology 2013
Optimization of programming current on endurance of phase change memory
- Sangbum Kim
- Pei-Ying Du
- et al.
- 2012
- VLSI-TSA 2012