POWER8TM: A 12-core server-class processor in 22nm SOI with 7.6Tb/s off-chip bandwidth
- Eric J. Fluhr
- Joshua Friedrich
- et al.
- 2014
- ISSCC 2014
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34 results for Victor Zyuban
POWER7™ local clocking and clocked storage elements
- James Warnock
- Leon Sigal
- et al.
- 2010
- ISSCC 2010
The implementation of POWER7™: A highly parallel and scalable multi-core high-end server processor
- Dieter Wendel
- Ronald Kalla
- et al.
- 2010
- ISSCC 2010
A proactive wearout recovery approach for exploiting microarchitectural redundancy to extend cache SRAM lifetime
- Jeonghee Shin
- Victor Zyuban
- et al.
- 2008
- ISCA 2008
Interconnections in multi-core architectures: Understanding mechanisms, overheads and scaling
- Rakesh Kumar
- Victor Zyuban
- et al.
- 2005
- ISCA 2005
Optimizing pipelines for power and performance
- Viji Srinivasan
- David Brooks
- et al.
- 2002
- MICRO 2002
The 12-core POWER8™ processor with 7.6 Tb/s IO bandwidth, integrated voltage regulation, and resonant clocking
- Eric J. Fluhr
- Steve Baumgartner
- et al.
- 2015
- IEEE JSSC
Integrated analysis of power and performance for pipelined microprocessors
- Victor Zyuban
- David Brooks
- et al.
- 2004
- IEEE TC
Inherently lower-power high-performance superscalar architectures
- Victor V. Zyuban
- Peter M. Kogge
- 2001
- IEEE TC
Power-performance comparative evaluation of alternate microarchitectures
- Rick Eickemeyer
- Michael Floyd
- et al.
- 2008
- HCS 2008