Lithographic qualification of high-Transmission mask blank for 10nm node and beyond
- Yongan Xu
- Tom Faure
- et al.
- 2016
- SPIE Advanced Lithography 2016
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13 results for Tom Faure
Two-dimensional mask effects at the 14 nm logic node
- A.E. Zweber
- A.E. McGuire
- et al.
- 2013
- SPIE Photomask Technology 2013
Conductive layer for charge dissipation during electron-beam exposures
- Luisa D. Bozano
- Ratnam Sooriyakumaran
- et al.
- 2012
- SPIE Photomask Technology + EUV Lithography 2012
Understanding the trade-offs of thinner binary mask absorbers
- Jaione Tirapu-Azpiroz
- Gregory McIntyre
- et al.
- 2010
- SPIE Photomask Technology + EUV Lithography 2010
Demonstrating the benefits of source-mask optimization and enabling technologies through experiment and simulations
- David Melville
- Alan E. Rosenbluth
- et al.
- 2010
- SPIE Advanced Lithography 2010
Intensive optimization of masks and sources for 22nm lithography
- Alan E. Rosenbluth
- David O. Melville
- et al.
- 2009
- SPIE Advanced Lithography 2009
Experimental result and simulation analysis for the use of pixelated illumination from source mask optimization for 22nm logic lithography process
- Kafai Lai
- Alan E. Rosenbluth
- et al.
- 2009
- SPIE Advanced Lithography 2009
Improving the power-performance of multicore processors through optimization of lithography and thermal processing
- A. Gabor
- T.A. Brunner
- et al.
- 2007
- SPIE Advanced Lithography 2007
Lithographic qualification of new opaque MoSi binary mask blank for the 32-nm node and beyond
- Greg McIntyre
- Michael Hibbs
- et al.
- 2010
- J. Micro/Nanolithogr. MEMS MOEMS
Optimization of silicon technology for the IBM System z9
- Daniel J. Poindexter
- Scott R. Stiffler
- et al.
- 2007
- IBM J. Res. Dev