Towards optimal performance-area trade-off in adders by synthesis of parallel prefix structures
- Subhendu Roy
- Mihir Choudhury
- et al.
- 2013
- DAC 2013
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27 results for David Z. Pan
TROY: Track router with yield-driven wire planning
- Minsik Cho
- Hua Xiang
- et al.
- 2007
- DAC 2007
Pushing ASIC performance in a power envelope
- Ruchir Puri
- Leon Stok
- et al.
- 2003
- DAC 2003
Chemical-mechanical polishing aware application-specific 3D NoC design
- Wooyoung Jang
- Ou He
- et al.
- 2011
- ICCAD 2011
Novel binary linear programming for high performance clock mesh synthesis
- Minsik Cho
- David Z. Pan
- et al.
- 2010
- ICCAD 2010
CAD for double patterning lithography
- David Z. Pan
- Jae-Seok Yang
- et al.
- 2010
- ICICDT 2010
Layout optimizations for double patterning lithography
- David Z. Pan
- Jae-Seok Yang
- et al.
- 2009
- ASICON 2009
Wire density driven global routing for CMP variation and timing
- Minsik Cho
- David Z. Pan
- et al.
- 2006
- ICCAD 2006
Accurate thermal analysis considering nonlinear thermal conductivity
- Anand Ramalingam
- Frank Liu
- et al.
- 2006
- ISQED 2006
Sleep transistor sizing using timing criticality and temporal currents
- Anand Ramalingam
- Bin Zhang
- et al.
- 2005
- ASP-DAC 2005