A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology
- Timothy O. Dickson
- Yong Liu
- et al.
- 2014
- CICC 2014
Publications
Date
Featured collections
Popular topics
24 results for Ankur Agrawal
Area efficient phase calibration of a 1.6 GHz multiphase DLL
- Ankur Agrawal
- Pavan Kumar Hanumolu
- et al.
- 2011
- CICC 2011
Efficient AI System Design with Cross-Layer Approximate Computing
- Swagath Venkataramani
- Xiao Sun
- et al.
- 2020
- Proceedings of the IEEE
A Scalable Multi-TeraOPS Core for AI Training and Inference
- Sunil Shukla
- Bruce Fleischer
- et al.
- 2018
- IEEE SSC-L