RaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
- Swagath Venkataramani
- Vijayalakshmi Srinivasan
- et al.
- 2021
- ISCA 2021
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19 results for Bruce Fleischer
A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling
- Ankur Agrawal
- Saekyu Lee
- et al.
- 2021
- ISSCC 2021
A 4R2W register file for a 2.3GHz wire-speed POWER™ processor with double-pumped write operation
- Gary S. Ditlow
- Robert K. Montoye
- et al.
- 2011
- ISSCC 2011
A 7-nm Four-Core Mixed-Precision AI Chip with 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
- Sae Kyu Lee
- Ankur Agrawal
- et al.
- 2021
- IEEE JSSC
Low-cost concurrent error detection for floating-point unit (FPU) controllers
- Michail Maniatakos
- Prabhakar Kudva
- et al.
- 2013
- IEEE TC
A 3.0 TFLOPS 0.62V Scalable Processor Core for High Compute Utilization AI Training and Inference
- Jinwook Oh
- Sae Kyu Lee
- et al.
- 2020
- VLSI Circuits 2020
DLFloat: A 16-b Floating Point Format Designed for Deep Learning Training and Inference
- Ankur Agrawal
- Bruce Fleischer
- et al.
- 2019
- ARITH 2019
A Scalable Multi-TeraOPS Deep Learning Processor Core for AI Trainina and Inference
- Bruce Fleischer
- Sunil Shukla
- et al.
- 2018
- VLSI Circuits 2018
Synthesis design strategies for energy-efficient microprocessors
- Ching Zhou
- Yu-Shiang Lin
- et al.
- 2016
- ICCD 2016
A statistical critical path monitor in 14nm CMOS
- Bruce Fleischer
- Christos Vezyrtzis
- et al.
- 2016
- ICCD 2016