A Software-Assisted Peak Current Regulation Scheme to Improve Power-Limited Inference Performance in a 5nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- ISSCC 2024
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60 results for Vijayalakshmi Srinivasan
Power-Limited Inference Performance Optimization Using a Software-Assisted Peak Current Regulation Scheme in a 5-nm AI SoC
- Monodeep Kar
- Joel Silberman
- et al.
- 2024
- IEEE Journal of Solid-State Circuits
DNNDaSher: A Compiler Framework for Dataflow Compatible End-to-End Acceleration on IBM AIU
- Sanchari Sen
- Shubham Jain
- et al.
- 2024
- IEEE Micro
Deep Compression of Pre-trained Transformer Models
- Naigang Wang
- Chi-Chun Liu
- et al.
- 2022
- NeurIPS 2022
OnSRAM: Efficient Inter-Node On-Chip Scratchpad Management in Deep Learning Accelerators
- Subhankar Pal
- Swagath Venkataramani
- et al.
- 2022
- Transactions on Embedded Computing Systems
A 7-nm Four-Core Mixed-Precision AI Chip with 26.2-TFLOPS Hybrid-FP8 Training, 104.9-TOPS INT4 Inference, and Workload-Aware Throttling
- Sae Kyu Lee
- Ankur Agrawal
- et al.
- 2021
- IEEE JSSC
RaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
- Swagath Venkataramani
- Vijayalakshmi Srinivasan
- et al.
- 2021
- ISCA 2021
Efficient Management of Scratch-Pad Memories in Deep Learning Accelerators
- Subhankar Pal
- Swagath Venkataramani
- et al.
- 2021
- ISPASS 2021
A 7nm 4-Core AI Chip with 25.6TFLOPS Hybrid FP8 Training, 102.4TOPS INT4 Inference and Workload-Aware Throttling
- Ankur Agrawal
- Saekyu Lee
- et al.
- 2021
- ISSCC 2021
Ultra-Low Precision 4-bit Training of Deep Neural Networks
- Xiao Sun
- Naigang Wang
- et al.
- 2020
- NeurIPS 2020