Deep learning acceleration in 14nm CMOS compatible ReRAM array: device, material and algorithm co-optimization
- N. Gong
- Malte J. Rasch
- et al.
- 2022
- IEDM 2022
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59 results for P. Jamison
Filamentary Statistical Evolution from Nano-Conducting Path to Switching-Filament for Oxide-RRAM in Memory Applications
- Ernest Wu
- Takashi Ando
- et al.
- 2019
- IEDM 2019
Multiple-Vt Solutions in Nanosheet Technology for High Performance and Low Power Applications
- Ruqiang Bao
- Reinaldo A. Vega
- et al.
- 2019
- IEDM 2019
Fundamental limitations of existing models and future solutions for dielectric reliability and RRAM applications (invited)
- Ernest Y. Wu
- Andrew Kim
- et al.
- 2017
- IEDM 2017
CMOS compatible MIM decoupling capacitor with reliable sub-nm EOT high-k stacks for the 7 nm node and beyond
- Takashi Ando
- Eduard Cartier
- et al.
- 2016
- IEDM 2016
Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- IEDM 2009
A comparison of electrical and physical properties of MOCVD hafnium silicate thin films deposited using various silicon precursors
- P. Jamison
- M. Copel
- et al.
- 2006
- MRS Spring Meeting 2006
Systematic study of workfunction engineering and scavenging effect using NiSi alloy FUSI metal gates with advanced gate stacks
- Y.-H. Kim
- C. Cabral Jr.
- et al.
- 2005
- IEDM 2005
Interface engineering for enhanced electron mobilities in W/HfO 2 gate stacks
- A.C. Callegari
- P. Jamison
- et al.
- 2004
- IEDM 2004
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004