Process-Induced ReRAM Performance Improvement of Atomic Layer Deposited HfO2 for Analog In-Memory Computing Applications
- Steven Consiglio
- H. Higuchi
- et al.
- 2021
- IMCS 2021
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59 results for P. Jamison
Selective Enablement of Dual Dipoles for near Bandedge Multi-Vt Solution in High Performance FinFET and Nanosheet Technologies
- Ruqiang Bao
- K. Watanabe
- et al.
- 2020
- VLSI Technology 2020
BEOL compatible high-capacitance MIMCAP structure using a novel high k material
- P. Jamison
- John Massey
- et al.
- 2020
- IMCS 2020
Interface engineering of Si1-xGex gate stacks for high performance dual channel CMOS
- Choonghyun Lee
- Richard G. Southwick
- et al.
- 2017
- ASICON 2017
Selective GeOx-scavenging from interfacial layer on Si1-xGex channel for high mobility Si/Si1-xGex CMOS application
- Choonghyun Lee
- H. Kim
- et al.
- 2016
- VLSI Technology 2016
Phenomena of dielectric capping layer insertion into high-κ metal gate stacks in gate-first/gate-last integration
- H. Jagannathan
- P. Jamison
- et al.
- 2012
- ECS Meeting 2012
Full metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011
Extremely thin SOI (ETSOI) technology: Past, present, and future
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2010
- IEEE International SOI Conference 2010
Challenges and opportunities of extremely thin SOI (ETSOI) CMOS technology for future low power and general purpose system-on-chip applications
- A. Khakifirooz
- Kangguo Cheng
- et al.
- 2010
- VLSI-TSA 2010
Optimizing band-edge high-κ/metal gate n-MOSFETs with ALD lanthanum oxide cap layers-oxidant and positioning effects
- Robert D. Clark
- H. Jagannathan
- et al.
- 2010
- ECS Transactions