Design and analysis of a self-repairing SRAM with on-chip monitor and compensation circuitry
- Niladri Narayan Mojumder
- Saibal Mukhopadhyay
- et al.
- 2008
- VTS 2008
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44 results for Kaushik Roy
Optimal dual-VT design in sub-100 nanometer PDSOI and double-gate technologies
- Aditya Bansal
- Jae-Joon Kim
- et al.
- 2008
- VLSID 2008
High-performance device optimization and dual-VT technology options for doublegate FET
- Aditya Bansal
- Keunwoo Kim
- et al.
- 2007
- ICICDT 2007
Accurate modeling and analysis of currents in trapezoidal FinFET devices
- R.M. Rao
- A. Bansal
- et al.
- 2007
- SOI 2007
Robust level converter design for sub-threshold logic
- Ik Joon Chang
- Jae-Joon Kim
- et al.
- 2006
- ISLPED 2006
Modeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISQED 2005
Modeling and analysis of total leakage currents in nanoscale double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISLPED 2005
Effectiveness of using supply voltage as back-gate bias in ground plane SOI MOSFET's
- Chris H. Kim
- Hari Ananthan
- et al.
- 2004
- IEEE International SOI Conference 2004
SOI-optimized 64-bit high-speed CMOS adder design
- Jae-Joon Kim
- Rajiv Joshi
- et al.
- 2002
- VLSI Circuits 2002
Quantifying the Brain Predictivity of Artificial Neural Networks With Nonlinear Response Mapping
- Aditi Anand
- Sanchari Sen
- et al.
- 2021
- Frontiers in Computational Neuroscience