Publications

745 results at IBM J. Res. Dev

Fabrication and characterization of robust through-silicon vias for silicon-carrier applications
- - Paul S. Andry
  - Cornelia K. Tsang
  - et al.
- 2008
- IBM J. Res. Dev
3D chip-stacking technology with through-silicon vias and low-volume lead free interconnections
- - Katsuyuki Sakuma
  - Paul S. Andry
  - et al.
- 2008
- IBM J. Res. Dev
Is 3D chip technology the next growth engine for performance improvement?
- - Philip G. Emma
  - Eren Kursun
- 2008
- IBM J. Res. Dev
Thermomechanical modeling of 3D electronic packages
- - Sri M. Sri-Jayantha
  - Gerard McVicker
  - et al.
- 2008
- IBM J. Res. Dev
3D chip stacking with C4 technology
- - Bing Dang
  - Steven L. Wright
  - et al.
- 2008
- IBM J. Res. Dev
Wafer-level 3D integration technology
- - Steven J. Koester
  - Albert M. Young
  - et al.
- 2008
- IBM J. Res. Dev
Three-dimensional silicon integration
- - John U. Knickerbocker
  - Paul S. Andry
  - et al.
- 2008
- IBM J. Res. Dev
Power-constrained high-frequency circuits for the IBM POWER6 microprocessor
- - Brian Curran
  - Eric Fluhr
  - et al.
- 2007
- IBM J. Res. Dev
Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI
- - Brian Flachs
  - Shigehiro Asano
  - et al.
- 2007
- IBM J. Res. Dev
Cell broadband engine processor: Design and implementation
- - Mack W. Riley
  - James D. Warnock
  - et al.
- 2007
- IBM J. Res. Dev