Scaled-footprint ultra-low power cryogenic InGaAs/InP HEMTs with record-high combination of low-noise and high-frequency performance
- 2025
- VLSI Technology and Circuits 2025
Publications
13 results at VLSI Technology and Circuits 2025
Vertical 2T-nC FeRAM Demonstration: BEOL Read Transistor for 4F2 Memory Strings and Two-Terminal Selector Design for Polarization Disturb Mitigation
- Shan Deng
- John Howe
- et al.
- 2025
- VLSI Technology and Circuits 2025
NanoStack Transistor Architecture for CMOS 7A Node and Beyond
- Shay Reboh
- Chen Zhang
- et al.
- 2025
- VLSI Technology and Circuits 2025
A 6+ GHz 128KB Multi-Port L1 Cache using Ground Rule Clean 10T Bitcells in 5nm Technology
- Rajiv Joshi
- John Davis
- et al.
- 2025
- VLSI Technology and Circuits 2025
Novel Advanced Low-k Dielectric for 2 nm and Beyond Cu and Post Cu Dual Damascene BEOL Interconnect Technologies
- Son Nguyen
- Huai Huang
- et al.
- 2025
- VLSI Technology and Circuits 2025
Compressive Diffusion Break Stressor for Gate-All-Around Nanosheet pFET Transistor Performance Improvement
- Steven Hung
- Shogo Mochizuki
- et al.
- 2025
- VLSI Technology and Circuits 2025
A 5.6-100K, 128ppm/K Cryo-CMOS Current Reference
- Subhajit Ray
- David Frank
- et al.
- 2025
- VLSI Technology and Circuits 2025
Backside Routing Enablement Considerations For Advanced Node GAA Devices
- Kumar Subramani
- Rwik Sengupta
- et al.
- 2025
- VLSI Technology and Circuits 2025
Tile Efficiency is not System Efficiency – CIM architecture studies of LLMs and other large DNNs
- Pritish Narayanan
- 2025
- VLSI Technology and Circuits 2025
Chiplet and Heterogeneous integration Technologies for HPC and AI
- 2025
- VLSI Technology and Circuits 2025