Compressive Diffusion Break Stressor for Gate-All-Around Nanosheet pFET Transistor Performance Improvement
- Steven Hung
- Shogo Mochizuki
- et al.
- 2025
- VLSI Technology and Circuits 2025
Huimei Zhou received her Ph.D. degree in Electrical Engineering from University of California in 2012, M.S. degree in Physics from Nanjing University in 2004, and B.S. degree in physics from Nanjing University in 2001. She joined IBM Research as a Device Engineer in 2015, then a Reliability Engineer. Prior to joining IBM, she worked as a postdoc at University of Illinois, Process Integration Engineer in Samsung Austin Semiconductor, Chartered (now Global Foundries), and SMIC. At IBM, Huimei worked on FinFET research and development first, then reliability research and development of Gate-All-Around nanosheet transistor, Vertical FET, and Nanostack transistor. She is highly skilled in the semiconductor process integration, device, and reliability. In addition to her technical expertise, she has been working with diverse teams innovating on advanced semiconductor devices and structures. She has published 60+ journal and conferences papers, and 100+ patents in the area of semiconductor devices, materials and reliability. Dr. Zhou served as the technical program committees, conference session chair and editor of peered review Journal, including IEEE International Electron Devices Meetings (IEDM), IEEE Electron Device Technology and Manufacturing (EDTM), International Reliability Physics Symposium (IRPS), and IEEE Transactions on Device and Materials Reliability (TDMR).