Epi Source-Drain Damage Mitigation During Channel Release of Stacked Nanosheet Gate-All-Around Transistors

Nanosheet gate-all-around devices have demonstrated several advantages in device performance and area scaling over finFET devices with higher device density and improved electrostatic control. Robust inner spacer (IS) and channel formation is critical for high performance, reduced variability and good yield. An isotropic dry etch of the sacrificial SiGe layer with extremely high selectivity to gate spacer, IS and Si channels is necessary for high-quality channel formation over a wide range of sheet widths. Furthermore, the nFET Si