Solder Mobility for High-Yield Self-Aligned Flip-Chip Assembly
Yves Martin, Swetha Kamlapurkar, et al.
ECTC 2017
The need for continued device scaling along with the increasing demand for high precision have lead to the development of atomic layer etch processes in semiconductor manufacturing. We have tested this new methodology with regard to patterning applications. While these new plasma-enhanced atomic layer etch (PE-ALE) processes show encouraging results, most patterning applications are best realized by optimizations through discharge chemistry and/or plasma parameters. While PE-ALE approaches seem to have limited success for trilayer patterning applications, significant improvements were obtained when applying them to small pitch. In particular the increased selectivity to OPL seems to offer a potential benefit for patterning high aspect ratio features.
Yves Martin, Swetha Kamlapurkar, et al.
ECTC 2017
Chiew-Seng Koay, Nelson Felix, et al.
SPIE Advanced Lithography 2016
Robert L. Bruce, Gloria Fraczak, et al.
SPIE Advanced Lithography 2017
William M. J. Green, Eric J. Zhang, et al.
OFC 2019