R. Puri, C.T. Chuang, et al.
IEEE Journal of Solid-State Circuits
This paper presents a new power gating structure with robust data retention capability using only one single double-gate device to provide both power gating switch and virtual supply/ground diode clamp functions. The scheme reduces the transistor count, area, and capacitance of the power gating structure, thus improving circuit performance, power, and leakage. The scheme is compared to the conventional power gating structure via mixed-mode physics-based two-dimensional numerical simulations. Analysis of virtual ground bounce for the proposed scheme is also presented.
R. Puri, C.T. Chuang, et al.
IEEE Journal of Solid-State Circuits
B.S. Wu, C.T. Chuang, et al.
VLSI-TSA 1993
Christophe R. Tretz, C.T. Chuang, et al.
International Journal of Electronics
R.V. Joshi, W. Hwang, et al.
ISLPED 2000