High-density data-retention power gating structure using a four-terminal double-gate device
- K. Kim
- K. Das
- et al.
- 2007
- International Journal of Electronics
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11 results at International Journal of Electronics
Transient analysis of electrical charge injection into charge-coupled devices
- S.G. Chamberlain
- B.Y. Woo
- 2007
- International Journal of Electronics
A floating-body charge monitoring technique for partially depleted SOI technology
- J.B. Kuang
- M.J. Saccamango
- et al.
- 2004
- International Journal of Electronics
Compact modeling methodology of strained-Si channel-on-insulator (SSOI) MOSFETs
- Keunwoo Kim
- Ching-Te Chuang
- et al.
- 2004
- International Journal of Electronics
Process/physics-based threshold voltage model for nano-scaled double-gate devices
- Keunwoo Kim
- Jerry G. Fossum
- et al.
- 2004
- International Journal of Electronics
Hysteresis effect in floating-body partially depleted SOI CMOS domino circuits
- Ruchir Puri
- Ching-Te Chuang
- 2003
- International Journal of Electronics
Performance analysis of tapered gate in PD/SOI CMOS technology
- W. Hwang
- C.T. Chuang
- et al.
- 2002
- International Journal of Electronics
Dual-mode parasitic bipolar effect in dynamic CVSL XOR circuit with floating-body partially depleted SOI devices
- C.T. Chuang
- P.F. Lu
- et al.
- 1999
- International Journal of Electronics
Metastability of SOI CMOS latches
- Christophe R. Tretz
- C.T. Chuang
- et al.
- 1999
- International Journal of Electronics
Number format conversion: Algorithm and VLSI module generator
- N.A. Kyrloglou
- O.G. Koufopavlou
- et al.
- 1992
- International Journal of Electronics