Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
Time dependent dielectric breakdown (TDDB) reliability is studied on interfacial layer (IL)/high-K gate stack of Gate-All-Around Nanosheet (GAA-NS) N-and P-type Field Effect Transistors (FETs) with volume-less multiple threshold voltage (multi-Vt) integration scheme enabled by the dual dipoles (n-dipole and p-dipole). We report for the first time Key TDDB Modeling parameters: voltage acceleration exponent (VAE), Weibull slope (β), and activation energy (Ea) and show robust TDDB reliability in multi-Vt NS transistors enabled by different dipoles.
Ruqiang Bao, K. Watanabe, et al.
VLSI Technology 2020
Miaomiao Wang, Sufi Zafar, et al.
Microelectronic Engineering
Ruqiang Bao, Brian Greene, et al.
IEDM 2015
Narendra Parihar, Richard G. Southwick, et al.
IEEE T-ED