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IEEE Trans Semicond Manuf
This paper describes modeling and hardware results of how the soft-error rate (SER) of a 65-nm silicon-on-insulator SRAM memory cell changes over time, as semiconductor aging effects shift the SRAM cell behavior. This paper also describes how the SER changes in the presence of systematic and random manufacturing variation. © 2008 IEEE.
Rouwaida Kanj, Zhuo Li, et al.
IEEE Trans Semicond Manuf
Peiyuan Wang, Wei Zhang, et al.
ICCAD 2012
Rajiv Joshi, Rouwaida Kanj, et al.
ICCAD 2011
David F. Heidel, Kenneth P. Rodbell, et al.
IBM J. Res. Dev