Rajiv Joshi, Rouwaida Kanj, et al.
ISLPED 2007
This paper describes modeling and hardware results of how the soft-error rate (SER) of a 65-nm silicon-on-insulator SRAM memory cell changes over time, as semiconductor aging effects shift the SRAM cell behavior. This paper also describes how the SER changes in the presence of systematic and random manufacturing variation. © 2008 IEEE.
Rajiv Joshi, Rouwaida Kanj, et al.
ISLPED 2007
Lama Shaer, Rouwaida Kanj, et al.
IEEE TCADIS
Antonio R. Pelella, Rajiv Joshi, et al.
IEEE International SOI Conference 2008
John Barth, Don Plass, et al.
VLSI Circuits 2012