Saurabh Sant, Paulina Aguirre, et al.
IEEE T-ED
Three-dimensional (3D) monolithic integration can enable higher density and has the potential to stack independently optimized layers at transistor level. Owing to high mobility and lower processing temperatures, InGaAs is well-suited to be used as the top layer channel material in 3D monolithic integration along with Si/Si(Ge) FETs. A review of recent progress to develop InGaAs-on-Si(Ge) 3D Monolithic technology is presented here.
Saurabh Sant, Paulina Aguirre, et al.
IEEE T-ED
Lukas Czornomaz, Veeresh Deshpande, et al.
ECS Meeting 2017 - New Orleans
Andreas V. Kuhlmann, Veeresh Deshpande, et al.
Applied Physics Letters
C. B. Zota, Clarissa Convertino, et al.
VLSI Technology 2018