A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14-nm CMOS
- Zeynep Toprak-Deniz
- Jonathan E. Proesel
- et al.
- 2020
- IEEE JSSC
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72 results for Mounir Meghelli
A 60-Gb/s 1.9-pJ/bit NRZ Optical Receiver with Low-Latency Digital CDR in 14-nm CMOS FinFET
- Ilter Ozkaya
- Alessandro Cevrero
- et al.
- 2018
- IEEE JSSC
A 32 Gb/s, 4.7 pJ/bit Optical Link With-11.7 dBm Sensitivity in 14-nm FinFET CMOS
- Jonathan E. Proesel
- Zeynep Toprak-Deniz
- et al.
- 2018
- IEEE JSSC
A 64-Gb/s 1.4-pJ/b NRZ Optical Receiver Data-Path in 14-nm CMOS FinFET
- Ilter Ozkaya
- Alessandro Cevrero
- et al.
- 2017
- IEEE JSSC
A 1.8 pJ/bit 16 × 16Gb/s source-synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration
- Timothy O. Dickson
- Yong Liu
- et al.
- 2016
- IEEE JSSC
A 25 Gb/s Burst-Mode Receiver for Low Latency Photonic Switch Networks
- Alexander V. Rylyakov
- Jonathan E. Proesel
- et al.
- 2015
- IEEE JSSC
A 32 Gb/s backplane transceiver with on-chip AC-coupling and low latency CDR in 32 nm SOI CMOS technology
- Gautam R. Gangasani
- Chun-Ming Hsu
- et al.
- 2014
- IEEE JSSC
A 16-Gb/s backplane transceiver with 12-tap current integrating DFE and dynamic adaptation of voltage offset and timing driftsin 45-nm SOI CMOS technology
- Gautam R. Gangasani
- Chun-Ming Hsu
- et al.
- 2012
- IEEE JSSC
3.9 ps SiGe HBT ECL ring oscillator and transistor design for minimum gate delay
- Basanth Jagannathan
- Mounir Meghelli
- et al.
- 2003
- IEEE Electron Device Letters
A 4.2-ps ECL ring-oscillator in a 285-GHz f MAX SiGe technology
- Basanth Jagannathan
- Mounir Meghelli
- et al.
- 2002
- IEEE Electron Device Letters