A full E-beam 0.25 mu m bipolar technology with sub-25 ps ECL gate delay
- J. Warnock
- J.D. Cressler
- et al.
- 1991
- IEDM 1991
Publications
Date
Featured collections
Popular topics
13 results for E.J. Petrillo
A novel high-performance lateral bipolar on SOI
- G. Shahidi
- D.D. Tang
- et al.
- 1991
- IEDM 1991
HIGHLY LATCHUP-IMMUNE 1- mu m CMOS TECHNOLOGY FABRICATED WITH 1 Mev ION IMPLANTATION AND SELF-ALIGNED TiSi//2.
- F.S. Lai
- L.K. Wang
- et al.
- 1984
- IEDM 1984
A Scaled 0.25- μm Bipolar Technology Using Full e-Beam Lithography
- John D. Cressler
- James Warnock
- et al.
- 1992
- IEEE Electron Device Letters
High-Performance Bipolar Technology for Improved ECL Power Delay
- J. Warnock
- J.D. Cressler
- et al.
- 1991
- IEEE Electron Device Letters
A low-power static frequency divider circuit in bipolar technology
- Kai Y. Toh
- Yen C. Tzeng
- et al.
- 1992
- BCTM 1992
SiGe-base PNP transistors fabricated with N-type UHV/CVD LTE in a 'No Dt' process
- D.L. Harame
- J.M.C. Stork
- et al.
- 1990
- VLSI Technology 1990
STUDY OF SILICON CONTAMINATION AND NEAR-SURFACE DAMAGE CAUSED BY CF//4/H//2 REACTIVE ION ETCHING.
- G.S. Oehrlein
- R.M. Tromp
- et al.
- 1983
- ECS Meeting 1983
Parameter and Reactor Dependence of Selective Oxide RIE in CF4 + H2
- L.M. Ephroth
- E.J. Petrillo
- 2019
- JES
Near-Surface Damage and Contamination after CF4/H2 Reactive Ion Etching of Si
- G.S. Oehrlein
- R.M. Tromp
- et al.
- 2019
- JES