On the Temperature Dependence of Majority Carrier Transport in Heavily Arsenic-Doped Polycrystalline Silicon Thin Films
- John D. Cressler
- Wei Hwang
- et al.
- 2019
- JES
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42 results for W. Hwang
Power reduction technique in coefficient multiplications through multiplier characterization
- Sangjin Hong
- Shu-Shin Chin
- et al.
- 2004
- Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology
Low-power circuits and technology for wireless digital systems
- Stephen V. Kosonocky
- Azeez J. Bhavnagarwala
- et al.
- 2003
- IBM J. Res. Dev
Multiplier architecture power consumption characterization for low-power DSP applications
- Sangjin Hong
- Shu-Shin Chin
- et al.
- 2002
- ICECS 2002
Long-term power minimization of dual-νΤ CMOS circuits
- Suhwan Kim
- Youngsoo Shin
- et al.
- 2002
- ASIC/SOC 2002
Performance analysis of tapered gate in PD/SOI CMOS technology
- W. Hwang
- C.T. Chuang
- et al.
- 2002
- International Journal of Electronics
Novel circuits to improve SRAM performance in PD/SOI technology
- R.V. Joshi
- A.J. Bhavnagarwala
- et al.
- 2001
- IEEE International SOI Conference 2001
Mixed multi-threshold differential cascode voltage switch (MT-DCVS) circuit styles and strategies for low power VLSI design
- W. Chen
- W. Hwang
- et al.
- 2001
- ISLPED 2001
Performance analysis of tapered gate in PD/SOI CMOS technology
- W. Hwang
- C.T. Chuang
- et al.
- 2001
- VLSI-TSA 2001
SOI for asynchronous dynamic circuits
- R.V. Joshi
- W. Hwang
- et al.
- 2001
- GLSVLSI 2001