A 10ns read and write non-volatile memory array using a magnetic tunnel junction and FET switch in each cell
- R. Scheuerlein
- W.J. Gallagher
- et al.
- 2000
- ISSCC 2000
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12 results for Roy E. Scheuerlein
SPT CELL - A NEW SUBSTRATE - PLATE TRENCH CELL FOR DRAMS.
- N.C.-C. Lu
- P.E. Cottrell
- et al.
- 1984
- IEDM 1984
Magnetization Reversal in Micron-Sized Magnetic Thin Films
- R.H. Koch
- J.G. Deak
- et al.
- 1998
- Physical Review Letters
Magneto-resistive IC memory limitations and architecture implications
- R. Scheuerlein
- 1998
- INVMTC 1998
Experimental 27 ns 1 Mb CMOS high-speed DRAM
- S. Dhong
- W.H. Henkels
- et al.
- 1989
- VLSI Circuits 1989
Memories of tomorrow
- William Reohr
- Heinz Hönigschmid
- et al.
- 2002
- IEEE Circuits and Devices Magazine
Exchange-biased magnetic tunnel junctions and application to nonvolatile magnetic random access memory (invited)
- S.S.P. Parkin
- K.P. Roche
- et al.
- 1999
- Journal of Applied Physics
A Large VDSData Retention Test Pattern for DRAM’s
- R.L. Franch
- S. Dhong
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
A Pulsed Sensing Scheme with a Limited BitLine Swing
- R. Scheuerlein
- Y. Katayama
- et al.
- 1992
- IEEE Journal of Solid-State Circuits
A 14-ns 4-Mb CMOS DRAM with 300-mW Active Power
- Toshiaki Kirihata
- Sang H. Dhong
- et al.
- 1992
- IEEE Journal of Solid-State Circuits